350nm工艺中几种通型晶体管逻辑风格的测量与比较

Andreas Rauchenecker, T. Ostermann
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引用次数: 0

摘要

通过更有效的实现,可以提高数字电路的性能。对于某些电路,这可以通过使用通管逻辑来完成。本文将通过晶体管的逻辑样式与标准CMOS逻辑样式进行了比较。它将显示,通过晶体管逻辑能够优于标准方法,不仅通过模拟,而且通过硅测量。测量已执行在温度范围从-40°C到80°C和电源电压范围从2.7V到3.6V。通过实测数据与仿真数据的对比,验证了仿真模型的正确性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Measurement and Comparison of Several Pass Transistor Logic Styles in a 350nm Technology
The performance of digital circuits can be improved by more efficient implementation. For certain circuits this can be done by using pass transistor logic. This paper compares pass transistor logic styles with the standard CMOS logic style. It will be shown that pass transistor logic is able to outperform the standard approach, not only by simulation but by measurements in silicon. Measurements have been executed over a temperature range from -40°C to 80°C and a supply voltage range from 2.7V to 3.6V. Simulation models are also verified through a comparison of the real measured data with simulation data.
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