245/243GHz, 9.2/10.5dBm饱和输出功率，4.6/2.8% PAE, 28/26dB增益的65nm CMOS功率放大器，采用2路和4路功率组合

2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 2021-11-07 DOI:10.1109/A-SSCC53895.2021.9634180

Byeonghun Yun, Dae-Woong Park, Kyung-Sik Choi, Ho-Jin Song, Sang-Gug Lee

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引用次数: 0

摘要

最近，次太赫兹(sub-THz)频段在高数据速率通信中备受关注，其中h波段(220-325GHz)是下一代(6G)无线通信系统的有力候选。就集成水平和成本而言，CMOS一直是最具商业化吸引力的技术。

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245/243GHz, 9.2/10.5dBm Saturated Output Power, 4.6/2.8% PAE, and 28/26dB Gain Power Amplifiers in 65nm CMOS Adopting 2-and 4-way Power Combining

Lately, sub-THz bands are drawing attention for high data-rate communications where the H-band (220-325GHz) is a strong candidate for the next generation (6G) wireless communication systems. In terms of the level of integration and cost, CMOS has been the most attractive technology for commercialization.

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2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)

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