一种具有成本效益的45nm 6T-SRAM,采用多vt不对称halo MOS和写入辅助电路,可降低50mV Vmin和53%待机泄漏

K. Nii, M. Yabuuchi, H. Fujiwara, Y. Tsukamoto, Y. Ishii, T. Matsumura, Y. Matsuda
{"title":"一种具有成本效益的45nm 6T-SRAM,采用多vt不对称halo MOS和写入辅助电路,可降低50mV Vmin和53%待机泄漏","authors":"K. Nii, M. Yabuuchi, H. Fujiwara, Y. Tsukamoto, Y. Ishii, T. Matsumura, Y. Matsuda","doi":"10.1109/ISQED.2013.6523648","DOIUrl":null,"url":null,"abstract":"We propose an enhanced high-density 6T-SRAM bitcell with multi-Vt asymmetric halo implant dose MOSFET (AH-MOS) by introducing additional masks. Modified mask structure contributes to reduce the number of halo implant dose masks and achieves dense 0.37 μm2 6T-SRAM bitcell without any area overhead, shrinking to a half size of our previous work. 4-Mbit SRAM test chips are fabricated using 45-nm bulk CMOS technology. Combining with write assist circuitry, the Vmin is reduced by 50 mV and standby leakage by 53%.","PeriodicalId":127115,"journal":{"name":"International Symposium on Quality Electronic Design (ISQED)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry\",\"authors\":\"K. Nii, M. Yabuuchi, H. Fujiwara, Y. Tsukamoto, Y. Ishii, T. Matsumura, Y. Matsuda\",\"doi\":\"10.1109/ISQED.2013.6523648\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose an enhanced high-density 6T-SRAM bitcell with multi-Vt asymmetric halo implant dose MOSFET (AH-MOS) by introducing additional masks. Modified mask structure contributes to reduce the number of halo implant dose masks and achieves dense 0.37 μm2 6T-SRAM bitcell without any area overhead, shrinking to a half size of our previous work. 4-Mbit SRAM test chips are fabricated using 45-nm bulk CMOS technology. Combining with write assist circuitry, the Vmin is reduced by 50 mV and standby leakage by 53%.\",\"PeriodicalId\":127115,\"journal\":{\"name\":\"International Symposium on Quality Electronic Design (ISQED)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Quality Electronic Design (ISQED)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2013.6523648\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2013.6523648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

我们提出了一种高密度的6T-SRAM位单元,通过引入额外的掩膜,具有多vt不对称晕植入剂量的MOSFET (AH-MOS)。改进的掩模结构减少了光晕植入剂量掩模的数量,实现了密度为0.37 μm2的6T-SRAM位元,没有任何面积开销,缩小到以前工作的一半大小。4mbit SRAM测试芯片采用45纳米体CMOS技术制造。结合写入辅助电路,Vmin降低了50 mV,待机泄漏降低了53%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry
We propose an enhanced high-density 6T-SRAM bitcell with multi-Vt asymmetric halo implant dose MOSFET (AH-MOS) by introducing additional masks. Modified mask structure contributes to reduce the number of halo implant dose masks and achieves dense 0.37 μm2 6T-SRAM bitcell without any area overhead, shrinking to a half size of our previous work. 4-Mbit SRAM test chips are fabricated using 45-nm bulk CMOS technology. Combining with write assist circuitry, the Vmin is reduced by 50 mV and standby leakage by 53%.
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