{"title":"具有优化功耗的单片双极16 × 16(+16)交叉点矩阵","authors":"J. Burkhart, J. Schomers","doi":"10.1109/ESSCIRC.1988.5468317","DOIUrl":null,"url":null,"abstract":"A bipolar 16×16(+16) crosspoint matrix for 140 Mbit/s communication systems is described. Low power consumption of less than 0.9 watt has been achieved by careful optimization of the signal network. The crosspoint matrix is capable of performing asynchronous, i.e. transparent switching of digital signals up to greater than 280 Mbit/s without an additional clock supply.","PeriodicalId":197244,"journal":{"name":"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Monolithic Bipolar 16 × 16 (+16) Crosspoint Matrix with Optimized Power Consumption\",\"authors\":\"J. Burkhart, J. Schomers\",\"doi\":\"10.1109/ESSCIRC.1988.5468317\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A bipolar 16×16(+16) crosspoint matrix for 140 Mbit/s communication systems is described. Low power consumption of less than 0.9 watt has been achieved by careful optimization of the signal network. The crosspoint matrix is capable of performing asynchronous, i.e. transparent switching of digital signals up to greater than 280 Mbit/s without an additional clock supply.\",\"PeriodicalId\":197244,\"journal\":{\"name\":\"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1988.5468317\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1988.5468317","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Monolithic Bipolar 16 × 16 (+16) Crosspoint Matrix with Optimized Power Consumption
A bipolar 16×16(+16) crosspoint matrix for 140 Mbit/s communication systems is described. Low power consumption of less than 0.9 watt has been achieved by careful optimization of the signal network. The crosspoint matrix is capable of performing asynchronous, i.e. transparent switching of digital signals up to greater than 280 Mbit/s without an additional clock supply.
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