31% Reduction of power consumption using active inductor at TX and AC termination at RX for a low-power post-LPDDR4 interfaces

A power reduction scheme that uses AC termination at RX and a TX output driver with an active inductor part (AIP) is proposed for a point-to-point post-LPDDR4 interface at 8 Gb/s. AC termination at the receiver I/O can reduce the power consumption by preventing DC power loss. However, this does not match the 50Ω termination, resulting in inter symbol interference (ISI). The proposed AIP in the TX output driver reduces the low-frequency gain and the ISI due to AC termination. This reduces the jitter caused by AC termination of the RX and greatly improves the eye-opening. In this paper, the AC termination at the RX and the AIP in the TX were implemented in a 28-nm CMOS process and operated at 8 Gb/s with a 3 inch FR4 microstrip line. The proposed transceiver chip achieves a peak-to-peak jitter of 43.6 ps and power reduction of 31% compared with chips without AC termination and AIP.