高密度集成电路中串扰信号的走线路由效应

2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2009-07-06 DOI:10.1109/IPFA.2009.5232656

Yinchao Chen, Shuhui Yang, Liguo Sun, K. Sun

{"title":"高密度集成电路中串扰信号的走线路由效应","authors":"Yinchao Chen, Shuhui Yang, Liguo Sun, K. Sun","doi":"10.1109/IPFA.2009.5232656","DOIUrl":null,"url":null,"abstract":"In this paper, we target to investigate the crosstalk between two adjacent traces by studying the effects of their spacing and orientation. It is found that the trace routing is a critical way to reduce the crosstalk between two traces designed in high-density integrated circuits. Simulation results show that two vertical traces result in the smallest crosstalk and that the crosstalk signals are insensitive to the spacing increment between two parallel traces in the range investigated.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Trace routing effects on crosstalk signals in high-density integrated circuits\",\"authors\":\"Yinchao Chen, Shuhui Yang, Liguo Sun, K. Sun\",\"doi\":\"10.1109/IPFA.2009.5232656\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we target to investigate the crosstalk between two adjacent traces by studying the effects of their spacing and orientation. It is found that the trace routing is a critical way to reduce the crosstalk between two traces designed in high-density integrated circuits. Simulation results show that two vertical traces result in the smallest crosstalk and that the crosstalk signals are insensitive to the spacing increment between two parallel traces in the range investigated.\",\"PeriodicalId\":210619,\"journal\":{\"name\":\"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-07-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2009.5232656\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2009.5232656","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

在本文中，我们的目标是通过研究两个相邻走线的间距和方向的影响来研究它们之间的串扰。研究发现，在高密度集成电路设计中，走线布线是减少两条走线间串扰的关键途径。仿真结果表明，两条垂直走线产生的串扰最小，串扰信号对所研究范围内两条平行走线之间的间距增量不敏感。

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Trace routing effects on crosstalk signals in high-density integrated circuits

In this paper, we target to investigate the crosstalk between two adjacent traces by studying the effects of their spacing and orientation. It is found that the trace routing is a critical way to reduce the crosstalk between two traces designed in high-density integrated circuits. Simulation results show that two vertical traces result in the smallest crosstalk and that the crosstalk signals are insensitive to the spacing increment between two parallel traces in the range investigated.

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2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

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