Inversion channel MOSFETs in 3C-SiC on silicon

Abstract : As a substrate material, single crystal SiC wafers are commercially available in diameters up to 75 mm, whereas silicon wafers a?e available in diameters of 200-300 mm. SiC wafers remain quite expensive compared to silicon, and contain%troublesome densities of micropipes that limit the yield of large devices. In the past, several groups have attempted to circumvent these problems by fabricating devices in 3C-SiC films grown epitaxially on silicon substrates, with limited success. However, in this paper we report new results demonstrating high quality inversion channel MOSFETs in 3C-SiC films on silicon. The inversion channel mobility of SiC MOSFETs has been limited to < 50 cm2JVs in the 4H polytype and < 100 cm2fVs in the 6H polytype by a high density of interface states in the upper half of the bandgap. Because of its narrower bandgap, the 3C polytype of SiC is expected to have lower interface state density, leading to higher channel mobilities. We fabricated lateral n-channel MOSFETs in 6 pin p-type epilayers of 3C-SiC grown on 20 off-axis Si(001) substrates. The epilayers were subsequently polished to improve surface smoothness, leaving a 3 %im layer. Sacrificial oxidation was then performed to remove damage caused by polishing. Source and drains were formed by implanting phosphorus and activating at 1250 0C for 30 minutes in argon. The gate oxide was formed by wet oxidation at 1150 0C for 30 minutes, followed by re-oxidation in wet O2 at 950 0C for two hours. A polysilicon gate was deposited by LPCVD and doped by spin-on dopant. Ohmic contacts are unannealed nickel. The resulting MOSFETs show excellent transistor behavior, with good current saturation, a threshold voltage of 1.6 V, and a peak channel mobility of 170 cm2/Vs.