{"title":"用于成本敏感产品的微处理器通信","authors":"P. Radcliffe, Xinghuo Yu","doi":"10.1109/INDIN.2006.275756","DOIUrl":null,"url":null,"abstract":"Communications to, or between, low end microprocessors within a product always comes at a cost. This paper develops a new, economic solution to this problem that will be useful in a range of cost sensitive applications. The paper starts by identifying the properties of an inter-microprocessor communications system that adds minimal cost to a product and enables the use of lower price microprocessors. This leads us to introduce a new category of communications called time independent asynchronous (TIA) communications. An economic 2-wire TIA communications protocol is developed and described using timing diagrams. This protocol is implemented with performance evaluation including data throughput. Simulation is used to examine livelock and deadlock properties.","PeriodicalId":120426,"journal":{"name":"2006 4th IEEE International Conference on Industrial Informatics","volume":"95 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Microprocessor Communications for Cost Sensitive Products\",\"authors\":\"P. Radcliffe, Xinghuo Yu\",\"doi\":\"10.1109/INDIN.2006.275756\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Communications to, or between, low end microprocessors within a product always comes at a cost. This paper develops a new, economic solution to this problem that will be useful in a range of cost sensitive applications. The paper starts by identifying the properties of an inter-microprocessor communications system that adds minimal cost to a product and enables the use of lower price microprocessors. This leads us to introduce a new category of communications called time independent asynchronous (TIA) communications. An economic 2-wire TIA communications protocol is developed and described using timing diagrams. This protocol is implemented with performance evaluation including data throughput. Simulation is used to examine livelock and deadlock properties.\",\"PeriodicalId\":120426,\"journal\":{\"name\":\"2006 4th IEEE International Conference on Industrial Informatics\",\"volume\":\"95 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 4th IEEE International Conference on Industrial Informatics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INDIN.2006.275756\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 4th IEEE International Conference on Industrial Informatics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDIN.2006.275756","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Microprocessor Communications for Cost Sensitive Products
Communications to, or between, low end microprocessors within a product always comes at a cost. This paper develops a new, economic solution to this problem that will be useful in a range of cost sensitive applications. The paper starts by identifying the properties of an inter-microprocessor communications system that adds minimal cost to a product and enables the use of lower price microprocessors. This leads us to introduce a new category of communications called time independent asynchronous (TIA) communications. An economic 2-wire TIA communications protocol is developed and described using timing diagrams. This protocol is implemented with performance evaluation including data throughput. Simulation is used to examine livelock and deadlock properties.