A 3ns GaAs 4K×1b SRAM

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1984.1156623

N. Yokoyama, H. Onodera, T. Shinoki, H. Ohnishi, H. Nishi, A. Shibatomi

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引用次数: 1

摘要

本文将介绍一种采用自对准硅化钨栅极技术的3ns 700mW GaAs 4K × 1b SRAM。该开发采用1.5μm栅极，E/D直接耦合场效应管逻辑和2μm线宽金属化。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 3ns GaAs 4K×1b SRAM

A 3ns 700mW GaAs 4K × 1b SRAM using tungsten-silicide gate, self-aligned technology, will be described. The development uses 1.5μm gates, E/D direct coupled FET logic and 2μm line-width metalization.

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来源期刊

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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