{"title":"中心频率精确可调的离散电荷域复带通滤波器分析","authors":"Yang Xu, H. Sun, U. Moon","doi":"10.1109/MWSCAS.2015.7282168","DOIUrl":null,"url":null,"abstract":"This paper proposes a new discrete-time complex bandpass (DT CBP) filter topology in charge domain, only using switches, capacitors, input transconductors and non-overlapping 2-phase clock scheme. The proposed DT filter features better power-efficiency, reduced complexity and easier process-scaling compared to the conventional topologies. It has an inherent anti-aliasing sinc characteristic due to the windowed integration of input voltage to current/charge during each phase. The center frequency is only determined by the capacitors ratio and sampling frequency, insensitive to PVT variations. The practical non-idealities, such as finite output impedance of input gm-stage, output impedance of source follower, non-zero switch resistance, etc. are mainly analyzed in this paper and compared with the simulated results. Simulations demonstrate that the proposed DT topology is quite robust to those non-idealities.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency\",\"authors\":\"Yang Xu, H. Sun, U. Moon\",\"doi\":\"10.1109/MWSCAS.2015.7282168\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a new discrete-time complex bandpass (DT CBP) filter topology in charge domain, only using switches, capacitors, input transconductors and non-overlapping 2-phase clock scheme. The proposed DT filter features better power-efficiency, reduced complexity and easier process-scaling compared to the conventional topologies. It has an inherent anti-aliasing sinc characteristic due to the windowed integration of input voltage to current/charge during each phase. The center frequency is only determined by the capacitors ratio and sampling frequency, insensitive to PVT variations. The practical non-idealities, such as finite output impedance of input gm-stage, output impedance of source follower, non-zero switch resistance, etc. are mainly analyzed in this paper and compared with the simulated results. Simulations demonstrate that the proposed DT topology is quite robust to those non-idealities.\",\"PeriodicalId\":216613,\"journal\":{\"name\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2015.7282168\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282168","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency
This paper proposes a new discrete-time complex bandpass (DT CBP) filter topology in charge domain, only using switches, capacitors, input transconductors and non-overlapping 2-phase clock scheme. The proposed DT filter features better power-efficiency, reduced complexity and easier process-scaling compared to the conventional topologies. It has an inherent anti-aliasing sinc characteristic due to the windowed integration of input voltage to current/charge during each phase. The center frequency is only determined by the capacitors ratio and sampling frequency, insensitive to PVT variations. The practical non-idealities, such as finite output impedance of input gm-stage, output impedance of source follower, non-zero switch resistance, etc. are mainly analyzed in this paper and compared with the simulated results. Simulations demonstrate that the proposed DT topology is quite robust to those non-idealities.