Stochastically computing discrete Fourier transform with reconfigurable digital fabric

Deviating from the deterministic convention, this paper offers a stochastic-based approach to efficiently compute discrete Fourier transform (DFT) with reconfigurable digital fabric. This is made possible by leveraging a well-known probabilistic principle and exploiting the convolution theorem. The resulting hardware implementation demonstrates significant advantages in both hardware usage and energy efficiency when compared with its conventional FPGA counterparts. Most interestingly, this architecture can readily achieve adjustable quality of results and graceful performance degradation when subject to device errors.