{"title":"在SystemC中基于GF(p^{m})的完全可伸缩Reed-Solomon编码器/解码器建模","authors":"André Sülflow, R. Drechsler","doi":"10.1109/ISMVL.2007.34","DOIUrl":null,"url":null,"abstract":"In this paper we describe how to model arithmetic circuits over GF(pm) in SystemC. An extension of a GF(2m) multiplier is presented to support GF(pm) arithmetic as well. A full integration in the simulation environment is discussed and the proposed solution can be fully synthesized down to hardware. This finds application in e.g. cryptographic systems. As a case study a Reed-Solomon encoder/decoder system was developed with full GF(pm) encoding/decoding capability. It is shown that the modeling of a HW/SW co-design system in SystemC can improve the speed of simulation by a factor of up to 17.","PeriodicalId":368339,"journal":{"name":"37th International Symposium on Multiple-Valued Logic (ISMVL'07)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Modeling a Fully Scalable Reed-Solomon Encoder/Decoder over GF(p^{m}) in SystemC\",\"authors\":\"André Sülflow, R. Drechsler\",\"doi\":\"10.1109/ISMVL.2007.34\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we describe how to model arithmetic circuits over GF(pm) in SystemC. An extension of a GF(2m) multiplier is presented to support GF(pm) arithmetic as well. A full integration in the simulation environment is discussed and the proposed solution can be fully synthesized down to hardware. This finds application in e.g. cryptographic systems. As a case study a Reed-Solomon encoder/decoder system was developed with full GF(pm) encoding/decoding capability. It is shown that the modeling of a HW/SW co-design system in SystemC can improve the speed of simulation by a factor of up to 17.\",\"PeriodicalId\":368339,\"journal\":{\"name\":\"37th International Symposium on Multiple-Valued Logic (ISMVL'07)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"37th International Symposium on Multiple-Valued Logic (ISMVL'07)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2007.34\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"37th International Symposium on Multiple-Valued Logic (ISMVL'07)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2007.34","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling a Fully Scalable Reed-Solomon Encoder/Decoder over GF(p^{m}) in SystemC
In this paper we describe how to model arithmetic circuits over GF(pm) in SystemC. An extension of a GF(2m) multiplier is presented to support GF(pm) arithmetic as well. A full integration in the simulation environment is discussed and the proposed solution can be fully synthesized down to hardware. This finds application in e.g. cryptographic systems. As a case study a Reed-Solomon encoder/decoder system was developed with full GF(pm) encoding/decoding capability. It is shown that the modeling of a HW/SW co-design system in SystemC can improve the speed of simulation by a factor of up to 17.
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