D. Tang, Guann-Pyng Li, C. Chuang, D. Danner, M. Ketchen, J. Mauer, M. Smyth, M. Manny, J. Cressler, B. Ginsberg, E. Petrillo, T. Ning, C. Hu, H. Pak
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引用次数: 16
摘要
本文将介绍最小门延迟为73ps的1.2pm si双极发射耦合逻辑电路。该电路采用双极技术(图1)制造，具有多基极自对准、多极发射极浅r / i / j、带壁发射极、硅填充沟槽隔离和多晶硅电阻等特点。该技术还用于实现具有I/I电阻的非阈值逻辑(NTL)电路。NTL环振荡器门延迟为44ps。
THIS PAPER will cover 1.2pm Si-bipolar Emitter-Couple-Logic circuits with a minimum gate delay of 73ps’. The circuits were fabricated with bipolar technology (Fi ure 1) featuring poly-base self-alignment, polyemitter shallow r o f i l j , walled-emitter together with silicon-filled trench isolation and polysilicon resistors. This technology was also used to implement non-threshold logic (NTL) circuits with I/I resistors. The NTL ring oscillator gate delay was found to be 44ps.
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