单片x波段啁啾雷达MMIC与拉伸处理

Jianjun Yu, Feng Zhao, Joseph Cali, Desheng Ma, X. Geng, F. Dai, J. Irwin, Andre Aklian
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引用次数: 9

摘要

介绍了一种采用直接数字合成(DDS)技术产生啁啾的单片x波段啁啾雷达收发器。该雷达芯片包括接收器、发射器、正交DDS、锁相环(PLL)和模数转换器(ADC),采用0.13μm BiCMOS技术实现。采用拉伸处理技术将接收和发射的啁啾信号之间的时间间隔转换为基带输出的单音,带宽大大降低,从而允许使用输入带宽降低10MHz的低成本ADC对带宽为150MHz的接收射频啁啾进行数字化。采用具有直流偏置的韦弗接收机,以便使用单个ADC检测具有图像抑制的接收正交信号。实现了一种带逆正弦函数的正交1GHz DDS,用于零阶保持校正,为接收机和发射机提供啁啾信号。集成了宽调谐锁相环频率合成器,用于产生本振(LO)信号以及DDS和ADC的时钟信号。所实现的雷达片上(RoC) MMIC占据3.5 × 2.5mm的芯片面积。该芯片的模拟/射频电源电压为2.2V,数字电源电压为1.5V,接收模式功耗为326mW,发送模式功耗为333mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A single-chip x-band chirp radar MMIC with stretch processing
A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13μm BiCMOS technology. The stretch processing technique is employed to translate the time interval between the received and the transmitted chirp signals to a single tone at the baseband output with greatly reduced bandwidth, which allows for the use of a low-cost ADC with a reduced input bandwidth of 10MHz for digitizing the received RF chirp with a bandwidth of 150MHz. A Weaver receiver with a dc-offset is employed in order to use a single ADC for detecting the received quadrature signals with image rejection. A quadrature 1GHz DDS with an inverse sinc function for zero-order hold correction is implemented to provide the chirp signals for both receiver and transmitter. A wide-tuning PLL frequency synthesizer is integrated to generate the local oscillator (LO) signals as well as the clock signal for the DDS and ADC. The implemented radar-on-chip (RoC) MMIC occupies a die area of 3.5 × 2.5mm. With a 2.2V supply voltage for analog/RF and a 1.5V supply for digital, the chip consumes 326mW in the receive mode and 333mW in the transmit mode.
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