J. Sleight, S. Bangsaruntip, A. Majumdar, G. Cohen, Y. Zhang, S. Engelmann, N. Fuller, L. Gignac, S. Mittal, J. Newbury, M. Frank, J. Chang, M. Guillorn
{"title":"栅极全能硅纳米线mosfet和电路","authors":"J. Sleight, S. Bangsaruntip, A. Majumdar, G. Cohen, Y. Zhang, S. Engelmann, N. Fuller, L. Gignac, S. Mittal, J. Newbury, M. Frank, J. Chang, M. Guillorn","doi":"10.1109/DRC.2010.5551965","DOIUrl":null,"url":null,"abstract":"We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET IDSAT = 825/950 µA/µm (circumference-normalized) or 2592/2985 µA/µm (diameter-normalized) at supply voltage VDD = 1 V and off-current IOFF = 15 nA/µm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed. Additionally, we observe a divergence of the nanowire capacitance from the planar limit, as expected, as well as enhanced device self-heating for smaller diameter nanowires. We have also applied this method to making functional 25-stage ring oscillator circuits.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Gate-all-around silicon nanowire MOSFETs and circuits\",\"authors\":\"J. Sleight, S. Bangsaruntip, A. Majumdar, G. Cohen, Y. Zhang, S. Engelmann, N. Fuller, L. Gignac, S. Mittal, J. Newbury, M. Frank, J. Chang, M. Guillorn\",\"doi\":\"10.1109/DRC.2010.5551965\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET IDSAT = 825/950 µA/µm (circumference-normalized) or 2592/2985 µA/µm (diameter-normalized) at supply voltage VDD = 1 V and off-current IOFF = 15 nA/µm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed. Additionally, we observe a divergence of the nanowire capacitance from the planar limit, as expected, as well as enhanced device self-heating for smaller diameter nanowires. We have also applied this method to making functional 25-stage ring oscillator circuits.\",\"PeriodicalId\":396875,\"journal\":{\"name\":\"68th Device Research Conference\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"68th Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2010.5551965\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"68th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2010.5551965","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Gate-all-around silicon nanowire MOSFETs and circuits
We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET IDSAT = 825/950 µA/µm (circumference-normalized) or 2592/2985 µA/µm (diameter-normalized) at supply voltage VDD = 1 V and off-current IOFF = 15 nA/µm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed. Additionally, we observe a divergence of the nanowire capacitance from the planar limit, as expected, as well as enhanced device self-heating for smaller diameter nanowires. We have also applied this method to making functional 25-stage ring oscillator circuits.
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