栅极全能硅纳米线mosfet和电路

J. Sleight, S. Bangsaruntip, A. Majumdar, G. Cohen, Y. Zhang, S. Engelmann, N. Fuller, L. Gignac, S. Mittal, J. Newbury, M. Frank, J. Chang, M. Guillorn
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引用次数: 9

摘要

我们展示了具有优异静电标度的无掺杂体,栅极全能(GAA)硅纳米线(NW) mosfet。这些NW器件具有基于TaN/ hf的栅极堆栈,具有高驱动电流性能,在电源电压VDD = 1 V,关闭电流IOFF = 15 nA/µm时,net / pet IDSAT = 825/950µa /µm(周长归一化)或2592/2985µa /µm(直径归一化)。优异的NW均匀性是通过使用氢退火和氧化相结合的工艺获得的。观察到短通道效应与NW大小的明显比例。此外,我们观察到纳米线电容偏离了平面极限,正如预期的那样,并且对于较小直径的纳米线,器件自加热增强。我们还将这种方法应用于制作功能良好的25级环形振荡器电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Gate-all-around silicon nanowire MOSFETs and circuits
We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET IDSAT = 825/950 µA/µm (circumference-normalized) or 2592/2985 µA/µm (diameter-normalized) at supply voltage VDD = 1 V and off-current IOFF = 15 nA/µm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed. Additionally, we observe a divergence of the nanowire capacitance from the planar limit, as expected, as well as enhanced device self-heating for smaller diameter nanowires. We have also applied this method to making functional 25-stage ring oscillator circuits.
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