{"title":"一种用于神经辐射场加速器的高能效精确可扩展计算阵列","authors":"Chaolin Rao, Haochuan Wan, Yueyang Zheng, Pingqiang Zhou, Xin Lou","doi":"10.1109/APCCAS55924.2022.10090268","DOIUrl":null,"url":null,"abstract":"Neural Radiance Field (NeRF), a recent advance in neural rendering, demonstrates impressive results for photo-realistic novel view synthesis. However, it faces challenges for deployment in practical rendering applications due to the large amount of multiply-accumulate (MAC) operations. For hardware accelerator design, precision-scalable MAC array, which can support computations with various precision can be used to optimize the power consumption of NeRF rendering accelerators. Recently, a variety of precision-scalable MAC arrays have been proposed to reduce the computational complexity of Convolutional Neural Networks (CNN). However, most of them require a lot of control logic to support different levels of precision. This paper proposes a precision-scalable MAC array with serial mode, which can support the multiplication with different precision of weight in multiple cycles with little overhead. Implementation results show that the energy efficiency of the proposed MAC array is about 14.54 TOPS/W and 4.83 TOPS/W for 4-bit and 8-bit computation modes, superior to other existing precision-scalable solutions.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Energy Efficient Precision Scalable Computation Array for Neural Radiance Field Accelerator\",\"authors\":\"Chaolin Rao, Haochuan Wan, Yueyang Zheng, Pingqiang Zhou, Xin Lou\",\"doi\":\"10.1109/APCCAS55924.2022.10090268\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Neural Radiance Field (NeRF), a recent advance in neural rendering, demonstrates impressive results for photo-realistic novel view synthesis. However, it faces challenges for deployment in practical rendering applications due to the large amount of multiply-accumulate (MAC) operations. For hardware accelerator design, precision-scalable MAC array, which can support computations with various precision can be used to optimize the power consumption of NeRF rendering accelerators. Recently, a variety of precision-scalable MAC arrays have been proposed to reduce the computational complexity of Convolutional Neural Networks (CNN). However, most of them require a lot of control logic to support different levels of precision. This paper proposes a precision-scalable MAC array with serial mode, which can support the multiplication with different precision of weight in multiple cycles with little overhead. Implementation results show that the energy efficiency of the proposed MAC array is about 14.54 TOPS/W and 4.83 TOPS/W for 4-bit and 8-bit computation modes, superior to other existing precision-scalable solutions.\",\"PeriodicalId\":243739,\"journal\":{\"name\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS55924.2022.10090268\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS55924.2022.10090268","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Energy Efficient Precision Scalable Computation Array for Neural Radiance Field Accelerator
Neural Radiance Field (NeRF), a recent advance in neural rendering, demonstrates impressive results for photo-realistic novel view synthesis. However, it faces challenges for deployment in practical rendering applications due to the large amount of multiply-accumulate (MAC) operations. For hardware accelerator design, precision-scalable MAC array, which can support computations with various precision can be used to optimize the power consumption of NeRF rendering accelerators. Recently, a variety of precision-scalable MAC arrays have been proposed to reduce the computational complexity of Convolutional Neural Networks (CNN). However, most of them require a lot of control logic to support different levels of precision. This paper proposes a precision-scalable MAC array with serial mode, which can support the multiplication with different precision of weight in multiple cycles with little overhead. Implementation results show that the energy efficiency of the proposed MAC array is about 14.54 TOPS/W and 4.83 TOPS/W for 4-bit and 8-bit computation modes, superior to other existing precision-scalable solutions.