非线性保边插值器的结构及软硬件验证

7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era Pub Date : 2012-05-16 DOI:10.1109/DTIS.2012.6232968

A. Boudabous, A. Atitallah, L. Khriji, N. Masmoudi

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引用次数: 1

摘要

本文提出了一种新的保边插值器的硬件实现方法。这项工作的目标是使用硬件开发板实现显著的运行时性能。它还展示了在各种图像之间一致的图像质量性能。这一验证表明，我们基于硬件/软件设计的实现加快了插值过程，并保持了高图像质量。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator

In this paper, a new hardware implementation of the Border-Preserving Interpolator is presented. The object of this proposed work is to achieve significant run time performance using a hardware development board. It also demonstrates consistent image quality performance among a variety of images. This validation show that our implementation based on HW/SW design speeds up the interpolation process as well as preserving a high image quality.

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7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era

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