负栅极电压下高断态偏置应力下p-GaN HEMT的电退化

Chi Zhang, Sheng Li, Siyang Liu, Jiaxing Wei, Wangran Wu, Weifeng Sun
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引用次数: 3

摘要

研究了p-GaN高电子迁移率晶体管(HEMT)在负栅极电压下高偏置应力下的电学参数变化。与传统的零栅极偏置应力条件下相比,负栅极偏置应力条件下阈值电压的正移更为显著,栅极漏电流的减小更为明显。栅极-源通路区高电场诱导的电子陷阱随着栅极负偏压的增大,捕获势垒层中更多的电子是主要的降解机制。该工作对研究p-GaN HEMT器件实际系统的长期可靠性具有重要意义。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Electrical Degradations of p-GaN HEMT under High Off-state Bias Stress with Negative Gate Voltage
The shifts of electrical parameters for p-GaN high electron mobility transistor (HEMT) under high off-state bias stress with negative gate voltage are investigated in this paper. Comparing to the conventional off-state bias stress with zero gate voltage, a more significant positive shift of threshold voltage and a more evident decrease of gate leakage current were observed under negative gate bias stress condition. The dominant degradation mechanism is suggested that electron traps induced by high electric field at gate-source access region capture more electrons in the barrier layer with the increasing negative gate bias. This work is of significance for the researches on the long-term reliability of the practical system using p-GaN HEMT device.
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