{"title":"具有真空退火低电阻欧姆接触的高性能黑磷场效应晶体管","authors":"Hyunik Park, Jinho Bae, Jihyun Kim","doi":"10.1109/DRC.2018.8442273","DOIUrl":null,"url":null,"abstract":"Layered black phosphorus (BP) exhibits desirable properties for nano-(opto)electronic device applications such as atomically thin body, direct bandgap (0.3 eV for bulk and 2.0 eV for monolayer), high carrier mobility of ~1,000 cm2/V·s, and current on/off ratio of ~105, which trigger intensive studies since its rediscovery. [1]–[3] However, high contact resistance caused by the formation of Schottky barrier and contamination at the metal-layered BP interface poses challenges in applying BP in device applications.[4] This problem becomes more serious for short-channel devices as the contact resistance is more dominant than the channel resistance, thereby, the device performance is limited by the contact resistance. Thermal annealing has been used as a promising technique for improving the contact properties in electronic devices. However, BP is vulnerable to the ambient molecules, especially in the elevated temperature, and deliberate studies of the thermal annealing on BP-based electronic devices are required. Here, the effect of post-fabrication vacuum annealing on the performance of BP field-effect transistor (FET) was investigated.","PeriodicalId":269641,"journal":{"name":"2018 76th Device Research Conference (DRC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"High performance black phosphorus field-effect transistors with vacuum-annealed low-resistance Ohmic contact\",\"authors\":\"Hyunik Park, Jinho Bae, Jihyun Kim\",\"doi\":\"10.1109/DRC.2018.8442273\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Layered black phosphorus (BP) exhibits desirable properties for nano-(opto)electronic device applications such as atomically thin body, direct bandgap (0.3 eV for bulk and 2.0 eV for monolayer), high carrier mobility of ~1,000 cm2/V·s, and current on/off ratio of ~105, which trigger intensive studies since its rediscovery. [1]–[3] However, high contact resistance caused by the formation of Schottky barrier and contamination at the metal-layered BP interface poses challenges in applying BP in device applications.[4] This problem becomes more serious for short-channel devices as the contact resistance is more dominant than the channel resistance, thereby, the device performance is limited by the contact resistance. Thermal annealing has been used as a promising technique for improving the contact properties in electronic devices. However, BP is vulnerable to the ambient molecules, especially in the elevated temperature, and deliberate studies of the thermal annealing on BP-based electronic devices are required. Here, the effect of post-fabrication vacuum annealing on the performance of BP field-effect transistor (FET) was investigated.\",\"PeriodicalId\":269641,\"journal\":{\"name\":\"2018 76th Device Research Conference (DRC)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 76th Device Research Conference (DRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2018.8442273\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 76th Device Research Conference (DRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2018.8442273","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High performance black phosphorus field-effect transistors with vacuum-annealed low-resistance Ohmic contact
Layered black phosphorus (BP) exhibits desirable properties for nano-(opto)electronic device applications such as atomically thin body, direct bandgap (0.3 eV for bulk and 2.0 eV for monolayer), high carrier mobility of ~1,000 cm2/V·s, and current on/off ratio of ~105, which trigger intensive studies since its rediscovery. [1]–[3] However, high contact resistance caused by the formation of Schottky barrier and contamination at the metal-layered BP interface poses challenges in applying BP in device applications.[4] This problem becomes more serious for short-channel devices as the contact resistance is more dominant than the channel resistance, thereby, the device performance is limited by the contact resistance. Thermal annealing has been used as a promising technique for improving the contact properties in electronic devices. However, BP is vulnerable to the ambient molecules, especially in the elevated temperature, and deliberate studies of the thermal annealing on BP-based electronic devices are required. Here, the effect of post-fabrication vacuum annealing on the performance of BP field-effect transistor (FET) was investigated.