低功耗Gb/s CMOS接口

Digest of Technical Papers., Symposium on VLSI Circuits. Pub Date : 1995-06-08 DOI:10.1109/VLSIC.1995.520673

Y. Ohtomo, M. Nogawa

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引用次数: 2

摘要

对于高速数字系统，开发在低转换速率下消耗低功耗的点对点Gb/s接口非常重要。本文提出了两种新型的Gb/s CMOS接口。一种使用主动上拉(APU)技术来提高最大传输速度。在另一个接口，传输波形由数字转换为脉冲，在低转换速率下显著降低功耗。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low power Gb/s CMOS interfaces

For high-speed digital systems, it is important to develop point-to-point Gb/s interfaces that consume low power during low-transition-rate operation. This paper presents two novel Gb/s CMOS interfaces. One uses an active-pull-up (APU) technique to raise the maximum transmission speed. In the other interface, the transmission wave form is changed from digital to impulse to markedly reduce power consumption at low transition rate.

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Digest of Technical Papers., Symposium on VLSI Circuits.

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