Thainann H. P. de Castro, R. Moreno, Dalton Martini Colombo
{"title":"使用scts的0.85 V CMOS电压和电流基准","authors":"Thainann H. P. de Castro, R. Moreno, Dalton Martini Colombo","doi":"10.1109/NEWCAS50681.2021.9462762","DOIUrl":null,"url":null,"abstract":"A new circuit topology of a voltage and current reference using self-cascode composite transistors and operating with a minimum supply voltage of 0.85 V is proposed in this work. Using nmos-version and pmos-version self-cascode composite transistors, the reference generates a nominal output voltage and current equal to 540 mV and 1.451 µA with temperature coefficients of 20 ppm/°C and 75 ppm/°C, respectively. The considered temperature range was – 30 °C to 100 °C. The circuit was implemented in a standard 0.18 µm n-well CMOS process, with the layout area of 0.175 mm2 (269 µm × 654 µm), and the supply current consumption of 9.1µA.","PeriodicalId":373745,"journal":{"name":"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A 0.85 V CMOS voltage and current reference using SCCTs\",\"authors\":\"Thainann H. P. de Castro, R. Moreno, Dalton Martini Colombo\",\"doi\":\"10.1109/NEWCAS50681.2021.9462762\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new circuit topology of a voltage and current reference using self-cascode composite transistors and operating with a minimum supply voltage of 0.85 V is proposed in this work. Using nmos-version and pmos-version self-cascode composite transistors, the reference generates a nominal output voltage and current equal to 540 mV and 1.451 µA with temperature coefficients of 20 ppm/°C and 75 ppm/°C, respectively. The considered temperature range was – 30 °C to 100 °C. The circuit was implemented in a standard 0.18 µm n-well CMOS process, with the layout area of 0.175 mm2 (269 µm × 654 µm), and the supply current consumption of 9.1µA.\",\"PeriodicalId\":373745,\"journal\":{\"name\":\"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NEWCAS50681.2021.9462762\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS50681.2021.9462762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.85 V CMOS voltage and current reference using SCCTs
A new circuit topology of a voltage and current reference using self-cascode composite transistors and operating with a minimum supply voltage of 0.85 V is proposed in this work. Using nmos-version and pmos-version self-cascode composite transistors, the reference generates a nominal output voltage and current equal to 540 mV and 1.451 µA with temperature coefficients of 20 ppm/°C and 75 ppm/°C, respectively. The considered temperature range was – 30 °C to 100 °C. The circuit was implemented in a standard 0.18 µm n-well CMOS process, with the layout area of 0.175 mm2 (269 µm × 654 µm), and the supply current consumption of 9.1µA.