{"title":"双栅MOS晶体管自洽优化及性能分析","authors":"S. Monfray, J. Autran, M. Jurczak, T. Skotnicki","doi":"10.1109/ESSDERC.2000.194783","DOIUrl":null,"url":null,"abstract":"The influence of architecture parameters on the charge carrier concentration has been theoretically investigated in both p-channel and n-channel Double Gate MOSFET’s. Based on a self-consistent solving of the Schrödinger and Poisson equations, this work clearly shows and quantifies the importance of the silicon thin-film thickness for electrical performance optimization of the device.","PeriodicalId":354721,"journal":{"name":"30th European Solid-State Device Research Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Self-consistent Optimization and Performance Analysis of Double-Gate MOS Transistors\",\"authors\":\"S. Monfray, J. Autran, M. Jurczak, T. Skotnicki\",\"doi\":\"10.1109/ESSDERC.2000.194783\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The influence of architecture parameters on the charge carrier concentration has been theoretically investigated in both p-channel and n-channel Double Gate MOSFET’s. Based on a self-consistent solving of the Schrödinger and Poisson equations, this work clearly shows and quantifies the importance of the silicon thin-film thickness for electrical performance optimization of the device.\",\"PeriodicalId\":354721,\"journal\":{\"name\":\"30th European Solid-State Device Research Conference\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-09-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"30th European Solid-State Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2000.194783\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"30th European Solid-State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2000.194783","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Self-consistent Optimization and Performance Analysis of Double-Gate MOS Transistors
The influence of architecture parameters on the charge carrier concentration has been theoretically investigated in both p-channel and n-channel Double Gate MOSFET’s. Based on a self-consistent solving of the Schrödinger and Poisson equations, this work clearly shows and quantifies the importance of the silicon thin-film thickness for electrical performance optimization of the device.