P. Moens, A. Banerjee, P. Coppens, A. Constant, P. Vanmeerbeek, Z. Li, F. Declercq, L. Schepper, H. Vleeschouwer, C. Liu, B. Padmanabhan, W. Jeon, J. Guo, A. Salih, M. Tack
{"title":"GaN功率器件的技术与设计","authors":"P. Moens, A. Banerjee, P. Coppens, A. Constant, P. Vanmeerbeek, Z. Li, F. Declercq, L. Schepper, H. Vleeschouwer, C. Liu, B. Padmanabhan, W. Jeon, J. Guo, A. Salih, M. Tack","doi":"10.1109/ESSDERC.2015.7324714","DOIUrl":null,"url":null,"abstract":"This paper reports on the technology and design aspects of an industrial DHEMT process for 650V rated GaN-on-Si power devices, using an in-situ MOCVD grown SiN as surface passivation and gate dielectric, with low interface state density and excellent TDDB. Optimization of the GaN epi stack results in very low off-state leakage (<;10nA/mm). Due to the reduction of buffer trapping, low dynamic Ron (<;10%) is obtained, both at room temperature and at high temperature.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Technology and design of GaN power devices\",\"authors\":\"P. Moens, A. Banerjee, P. Coppens, A. Constant, P. Vanmeerbeek, Z. Li, F. Declercq, L. Schepper, H. Vleeschouwer, C. Liu, B. Padmanabhan, W. Jeon, J. Guo, A. Salih, M. Tack\",\"doi\":\"10.1109/ESSDERC.2015.7324714\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper reports on the technology and design aspects of an industrial DHEMT process for 650V rated GaN-on-Si power devices, using an in-situ MOCVD grown SiN as surface passivation and gate dielectric, with low interface state density and excellent TDDB. Optimization of the GaN epi stack results in very low off-state leakage (<;10nA/mm). Due to the reduction of buffer trapping, low dynamic Ron (<;10%) is obtained, both at room temperature and at high temperature.\",\"PeriodicalId\":332857,\"journal\":{\"name\":\"2015 45th European Solid State Device Research Conference (ESSDERC)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 45th European Solid State Device Research Conference (ESSDERC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2015.7324714\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 45th European Solid State Device Research Conference (ESSDERC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2015.7324714","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper reports on the technology and design aspects of an industrial DHEMT process for 650V rated GaN-on-Si power devices, using an in-situ MOCVD grown SiN as surface passivation and gate dielectric, with low interface state density and excellent TDDB. Optimization of the GaN epi stack results in very low off-state leakage (<;10nA/mm). Due to the reduction of buffer trapping, low dynamic Ron (<;10%) is obtained, both at room temperature and at high temperature.
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