{"title":"大型模拟电路的符号-数值联合仿真","authors":"S. Dordevic, P. Petkovi","doi":"10.1109/MIEL.2002.1003338","DOIUrl":null,"url":null,"abstract":"This paper presents a new method for hierarchical analysis of large circuits that combine numeric and symbolic simulation. Symbolic analysis is applied only on subcircuits at the lowest hierarchical level. This approach proves beneficial for symbolic and numeric simulation. The time reduction is given on a benchmark example.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Symbolic-numeric co-simulation of large analogue circuits\",\"authors\":\"S. Dordevic, P. Petkovi\",\"doi\":\"10.1109/MIEL.2002.1003338\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new method for hierarchical analysis of large circuits that combine numeric and symbolic simulation. Symbolic analysis is applied only on subcircuits at the lowest hierarchical level. This approach proves beneficial for symbolic and numeric simulation. The time reduction is given on a benchmark example.\",\"PeriodicalId\":221518,\"journal\":{\"name\":\"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MIEL.2002.1003338\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2002.1003338","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Symbolic-numeric co-simulation of large analogue circuits
This paper presents a new method for hierarchical analysis of large circuits that combine numeric and symbolic simulation. Symbolic analysis is applied only on subcircuits at the lowest hierarchical level. This approach proves beneficial for symbolic and numeric simulation. The time reduction is given on a benchmark example.