ePUMA:一种新颖的嵌入式并行DSP平台,用于预测计算

Jian Wang, Joar Sohl, Olof Kraigher, Dake Liu
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引用次数: 10

摘要

本文介绍了一种基于主-多simd架构的新型并行DSP平台。该平台命名为ePUMA[1]。关键技术是使用分离的数据访问内核和算法内核,通过并行运行两种类型的内核来最小化并行处理的通信开销。ePUMA平台针对可预测计算进行了优化。根据基准测试结果,依赖于定期和可预测的内存访问的内存子系统设计可以显著提高性能。作为一个可扩展的并行平台,芯片面积估计不同数量的协处理器。ePUMA并行平台的目标是实现低功耗高性能嵌入式并行计算与低硅成本的通信和类似的信号处理应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
ePUMA: A novel embedded parallel DSP platform for predictable computing
In this paper, a novel parallel DSP platform based on master-multi-SIMD architecture is introduced. The platform is named ePUMA [1]. The essential technology is to use separated data access kernels and algorithm kernels to minimize the communication overhead of parallel processing by running the two types of kernels in parallel. ePUMA platform is optimized for predictable computing. The memory subsystem design that relies on regular and predictable memory accesses can dramatically improve the performance according to benchmarking results. As a scalable parallel platform, the chip area is estimated for different number of co-processors. The aim of ePUMA parallel platform is to achieve low power high performance embedded parallel computing with low silicon cost for communications and similar signal processing applications.
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