用于嵌入式WLAN应用的IEEE 802.11a/b/g SoC

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers Pub Date : 2006-09-18 DOI:10.1109/ISSCC.2006.1696193

L. Nathawad, David J Weber, S. Abdollahi-Alibeik, Phoebe Chen, S. Enam, B. Kaczynski, A. Kheirkhahi, MeeLan Lee, S. Limotyrakis, K. Onodera, K. Vleugels, M. Zargari, B. Wooley

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引用次数: 31

摘要

一款适用于低功耗嵌入式应用的802.11 a/b/g无线局域网SoC采用0.18 μ m CMOS技术实现。该IC集成了射频收发器、数字PHY和MAC、CPU和主机接口。对于64QAM OFDM，在输出功率为-5.2dBm/-3.5dBm时，5GHz/2.4GHz TX EVM为-27.4dB/-27.5dB。总体5GHz/2.4GHz RX灵敏度在54Mb/s时为-73dBm/-76dBm

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An IEEE 802.11a/b/g SoC for Embedded WLAN Applications

An 802.11 a/b/g wireless LAN SoC for low-power embedded applications is implemented in a 0.18mum CMOS technology. The IC integrates the RF transceiver, digital PHY and MAC, CPU and host interface. For 64QAM OFDM, the 5GHz/2.4GHz TX EVM is -27.4dB/-27.5dB at an output power of -5.2dBm/-3.5dBm. Overall 5GHz/2.4GHz RX sensitivity is -73dBm/-76dBm at 54Mb/s

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2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

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