用于内存带宽有限的工作负载的2x -带宽突发6T-SRAM

2020 IEEE Symposium on VLSI Circuits Pub Date : 2020-06-01 DOI:10.1109/VLSICircuits18222.2020.9162815

C. Augustine, Somnath Paul, Turbo Majumder, J. Tschanz, M. Khellah, V. De

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引用次数: 1

摘要

10nm CMOS的20KB 6T-SRAM阵列在突发模式下的读取带宽提高了2倍。带宽翻倍的能源效率比频率翻倍高51%，面积效率比银行数量翻倍高30%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2X-Bandwidth Burst 6T-SRAM for Memory Bandwidth Limited Workloads

A 20KB 6T-SRAM array in 10nm CMOS demonstrates 2X higher read bandwidth in burst mode operation. The doubling of bandwidth is achieved with 51% higher energy efficiency than frequency doubling and 30% better area efficiency than doubling the number of banks.

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2020 IEEE Symposium on VLSI Circuits

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