K. Hara, J. Sakano, H. Honda, Junichi Aizawa, Taiga Arai
{"title":"新的低电阻和紧凑的mosfet模拟开关ic与v槽介电隔离","authors":"K. Hara, J. Sakano, H. Honda, Junichi Aizawa, Taiga Arai","doi":"10.1109/ISPSD.2011.5890783","DOIUrl":null,"url":null,"abstract":"A low-resistance and compact MOSFET for analog switch ICs with Dielectric Isolation (DI) process technology is proposed. To obtain a high current density, we have developed new MOSFET with internal prominence, which reduce the drift resistance of devices with a high breakdown voltage. New N-ch and P-ch compact MOSFETs for level shifters have also been developed that can control saturation current with a low electric field under the gate region by using a junction field effect transistor structure for higher hot carrier reliability. The areas of these MOSFETs can be shrunk about 40% in 220-V devices.","PeriodicalId":132504,"journal":{"name":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"New low-resistance and compact MOSFETs for analog switch ICs with V-groove dielectric isolation\",\"authors\":\"K. Hara, J. Sakano, H. Honda, Junichi Aizawa, Taiga Arai\",\"doi\":\"10.1109/ISPSD.2011.5890783\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-resistance and compact MOSFET for analog switch ICs with Dielectric Isolation (DI) process technology is proposed. To obtain a high current density, we have developed new MOSFET with internal prominence, which reduce the drift resistance of devices with a high breakdown voltage. New N-ch and P-ch compact MOSFETs for level shifters have also been developed that can control saturation current with a low electric field under the gate region by using a junction field effect transistor structure for higher hot carrier reliability. The areas of these MOSFETs can be shrunk about 40% in 220-V devices.\",\"PeriodicalId\":132504,\"journal\":{\"name\":\"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2011.5890783\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2011.5890783","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New low-resistance and compact MOSFETs for analog switch ICs with V-groove dielectric isolation
A low-resistance and compact MOSFET for analog switch ICs with Dielectric Isolation (DI) process technology is proposed. To obtain a high current density, we have developed new MOSFET with internal prominence, which reduce the drift resistance of devices with a high breakdown voltage. New N-ch and P-ch compact MOSFETs for level shifters have also been developed that can control saturation current with a low electric field under the gate region by using a junction field effect transistor structure for higher hot carrier reliability. The areas of these MOSFETs can be shrunk about 40% in 220-V devices.