具有五端磁畴壁运动装置的混合多晶逻辑门

Farhana Parveen, Zhezhi He, Shaahin Angizi, Deliang Fan
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引用次数: 25

摘要

本文提出了一种基于五端磁畴壁运动器件的键控混合自旋cmos多晶逻辑门。所提出的混合多态门能够通过配置应用键来执行一整套2输入布尔逻辑功能(即AND/NAND, OR/NOR, NOT, XOR/XNOR)。SPICE器件电路联合仿真表明,与传统CMOS全加法器设计相比,采用本文提出的多晶型逻辑门设计的全加法器功耗降低74.23%,晶体管数量减少7.14%。我们提出的多态门可能是一个有前途的硬件安全原语,通过逻辑锁定和多态转换来解决IC伪造或逆向工程。总之,通过提供零泄漏功率、低动态功耗、紧凑和多态的逻辑电路,我们提出的设计可以为未来节能和安全的计算平台提供新的范例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Hybrid Polymorphic Logic Gate with 5-Terminal Magnetic Domain Wall Motion Device
In this paper, a key-controlled hybrid spin-CMOS polymorphic logic gate using a novel 5 terminal magnetic domain wall motion device is proposed. The proposed hybrid polymorphic gate is able to perform a full set of 2-input Boolean logic functions (i.e. AND/NAND, OR/NOR, NOT, XOR/XNOR) by configuring the applied keys. The SPICE device-circuit co-simulation indicates that a full adder design using our proposed polymorphic logic gate shows 74.23% power reduction and 7.14% transistor count reduction compared with traditional CMOS full adder design. Our proposed polymorphic gate could be a promising hardware security primitive to address IC counterfeiting or reverse engineering by logic locking and polymorphic transformation. To summarize, by providing zero leakage power, low dynamic power consumption, compactness and polymorphism to logic circuits, our proposed design can thrive a new paradigm for future power efficient and secured computing platform.
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