{"title":"一种用于肌电信号传感的低功耗可编程增益集成前端","authors":"Ehab A. Hamed, M. Atef, M. Abbas","doi":"10.23919/MIXDES.2018.8444557","DOIUrl":null,"url":null,"abstract":"This paper presents the design and post layout simulation for electromyogram (EMG) front-end. The architecture is characterized by ultralow power consumption and gain reconfigurability. Three stages are designed to form the whole front-end. The first stage is extremely efficient single ended amplifier. The second stage is programable gain differential ended amplifier, to enhance the overall supply rejection ratio, common mode rejection ratio and the dynamic range. Finally, the third stage is a buffer stage to isolate the loading from the amplifier. The first two stages are designed with cascode MOSFETs to increase the midband gain. The full design was post-layout simulated using 130 nm CMOS technology. The results show that the design has 60.36 dB mid-band gain in range of 5.3 Hz to 1.72 kHz. Using a supply voltage of 1.1 V, the first two stages consume $\\pmb{1.06\\mu A}$. The input referred noise is $2.95\\mu \\mathrm{V}_{\\mathrm{rms}}$. The common mode and power supply rejection ratios are above 94.5 dB and 79.4 dB respectively.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Low Power Programmable Gain Integrated Front-End for Electromyogram Signal Sensing\",\"authors\":\"Ehab A. Hamed, M. Atef, M. Abbas\",\"doi\":\"10.23919/MIXDES.2018.8444557\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and post layout simulation for electromyogram (EMG) front-end. The architecture is characterized by ultralow power consumption and gain reconfigurability. Three stages are designed to form the whole front-end. The first stage is extremely efficient single ended amplifier. The second stage is programable gain differential ended amplifier, to enhance the overall supply rejection ratio, common mode rejection ratio and the dynamic range. Finally, the third stage is a buffer stage to isolate the loading from the amplifier. The first two stages are designed with cascode MOSFETs to increase the midband gain. The full design was post-layout simulated using 130 nm CMOS technology. The results show that the design has 60.36 dB mid-band gain in range of 5.3 Hz to 1.72 kHz. Using a supply voltage of 1.1 V, the first two stages consume $\\\\pmb{1.06\\\\mu A}$. The input referred noise is $2.95\\\\mu \\\\mathrm{V}_{\\\\mathrm{rms}}$. The common mode and power supply rejection ratios are above 94.5 dB and 79.4 dB respectively.\",\"PeriodicalId\":349007,\"journal\":{\"name\":\"2018 25th International Conference \\\"Mixed Design of Integrated Circuits and System\\\" (MIXDES)\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 25th International Conference \\\"Mixed Design of Integrated Circuits and System\\\" (MIXDES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/MIXDES.2018.8444557\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIXDES.2018.8444557","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Low Power Programmable Gain Integrated Front-End for Electromyogram Signal Sensing
This paper presents the design and post layout simulation for electromyogram (EMG) front-end. The architecture is characterized by ultralow power consumption and gain reconfigurability. Three stages are designed to form the whole front-end. The first stage is extremely efficient single ended amplifier. The second stage is programable gain differential ended amplifier, to enhance the overall supply rejection ratio, common mode rejection ratio and the dynamic range. Finally, the third stage is a buffer stage to isolate the loading from the amplifier. The first two stages are designed with cascode MOSFETs to increase the midband gain. The full design was post-layout simulated using 130 nm CMOS technology. The results show that the design has 60.36 dB mid-band gain in range of 5.3 Hz to 1.72 kHz. Using a supply voltage of 1.1 V, the first two stages consume $\pmb{1.06\mu A}$. The input referred noise is $2.95\mu \mathrm{V}_{\mathrm{rms}}$. The common mode and power supply rejection ratios are above 94.5 dB and 79.4 dB respectively.