T. Liao, C. Chiu, C. Kuan, Tsung-Yi Huang, Tsung-Yu Yang
{"title":"利用Ge夹层和图案化衬底提高氮化氮化镓的接触电阻","authors":"T. Liao, C. Chiu, C. Kuan, Tsung-Yi Huang, Tsung-Yu Yang","doi":"10.1109/INEC.2014.7460449","DOIUrl":null,"url":null,"abstract":"This paper is demonstrated the effect of Ge interlayer and patterned substrate to form low resistance Ohmic contact of n-GaN. The Ge interlayer is acted as heavily n-type dopant atoms at the interface of metal and n-GaN to enhance carrier tunneling. The patterned substrate is designed to increase the annealing temperature at the interface of the metal and n-GaN. Contact resistances were derived from the plot of the measured resistance versus gap spacing by TLM (Transmission Line Model). After annealing at 400 °C for 5mins, It is shown that, Al (300nm)/Ti (30nm)/Ge (10nm)/ pit-patterned n-GaN substrate scheme exhibit ohmic contact behavior with a resistivity of 3.49×10-5 Ω-cm2. The low contact resistance is formed by Al (300nm)/Ti (30nm)/Ge (10nm)/pit-patterned n-GaN substrate scheme, and it is compare with Al (300nm)/Ti (30nm)/n-GaN substrate. Therefore, this results show that utilizing Ge interlayer and patterned substrate could serve as an important processing tool for forming low-resistance Ohmic contacts of n-GaN.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Utilizing Ge interlayer and patterned substrate to improve the contact resistance of n-GaN\",\"authors\":\"T. Liao, C. Chiu, C. Kuan, Tsung-Yi Huang, Tsung-Yu Yang\",\"doi\":\"10.1109/INEC.2014.7460449\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper is demonstrated the effect of Ge interlayer and patterned substrate to form low resistance Ohmic contact of n-GaN. The Ge interlayer is acted as heavily n-type dopant atoms at the interface of metal and n-GaN to enhance carrier tunneling. The patterned substrate is designed to increase the annealing temperature at the interface of the metal and n-GaN. Contact resistances were derived from the plot of the measured resistance versus gap spacing by TLM (Transmission Line Model). After annealing at 400 °C for 5mins, It is shown that, Al (300nm)/Ti (30nm)/Ge (10nm)/ pit-patterned n-GaN substrate scheme exhibit ohmic contact behavior with a resistivity of 3.49×10-5 Ω-cm2. The low contact resistance is formed by Al (300nm)/Ti (30nm)/Ge (10nm)/pit-patterned n-GaN substrate scheme, and it is compare with Al (300nm)/Ti (30nm)/n-GaN substrate. Therefore, this results show that utilizing Ge interlayer and patterned substrate could serve as an important processing tool for forming low-resistance Ohmic contacts of n-GaN.\",\"PeriodicalId\":188668,\"journal\":{\"name\":\"2014 IEEE International Nanoelectronics Conference (INEC)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-07-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE International Nanoelectronics Conference (INEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INEC.2014.7460449\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Nanoelectronics Conference (INEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INEC.2014.7460449","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Utilizing Ge interlayer and patterned substrate to improve the contact resistance of n-GaN
This paper is demonstrated the effect of Ge interlayer and patterned substrate to form low resistance Ohmic contact of n-GaN. The Ge interlayer is acted as heavily n-type dopant atoms at the interface of metal and n-GaN to enhance carrier tunneling. The patterned substrate is designed to increase the annealing temperature at the interface of the metal and n-GaN. Contact resistances were derived from the plot of the measured resistance versus gap spacing by TLM (Transmission Line Model). After annealing at 400 °C for 5mins, It is shown that, Al (300nm)/Ti (30nm)/Ge (10nm)/ pit-patterned n-GaN substrate scheme exhibit ohmic contact behavior with a resistivity of 3.49×10-5 Ω-cm2. The low contact resistance is formed by Al (300nm)/Ti (30nm)/Ge (10nm)/pit-patterned n-GaN substrate scheme, and it is compare with Al (300nm)/Ti (30nm)/n-GaN substrate. Therefore, this results show that utilizing Ge interlayer and patterned substrate could serve as an important processing tool for forming low-resistance Ohmic contacts of n-GaN.