{"title":"单时钟,单锁存,扫描设计","authors":"Amit M. Sheth, J. Savir","doi":"10.1109/IMTC.2002.1006912","DOIUrl":null,"url":null,"abstract":"This paper describes a new scan design that uses the same clock for both scan and functional mode. A test made signal distinguishes between normal and test operations. This new design enjoys savings in circuits, pins, test time, and also enjoys the benefits of a high-speed scan capability.","PeriodicalId":141111,"journal":{"name":"IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Single-clock, single-latch, scan design\",\"authors\":\"Amit M. Sheth, J. Savir\",\"doi\":\"10.1109/IMTC.2002.1006912\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a new scan design that uses the same clock for both scan and functional mode. A test made signal distinguishes between normal and test operations. This new design enjoys savings in circuits, pins, test time, and also enjoys the benefits of a high-speed scan capability.\",\"PeriodicalId\":141111,\"journal\":{\"name\":\"IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.2002.1006912\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.2002.1006912","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes a new scan design that uses the same clock for both scan and functional mode. A test made signal distinguishes between normal and test operations. This new design enjoys savings in circuits, pins, test time, and also enjoys the benefits of a high-speed scan capability.