{"title":"空间无关压缩:非易失性主存储器的功率降低","authors":"Yong Li, Haifeng Xu, R. Melhem, A. Jones","doi":"10.1145/2742060.2742107","DOIUrl":null,"url":null,"abstract":"Power consumption of main memory has become a critical concern and has led to proposals to employ emerging non-volatile memories (NVMs) to replace or augment DRAM. This paper proposes Space Oblivious COmpression (SOCO), an in-place lightweight compression mechanism particularly designed for reducing NVM-based main-memory energy rather than saving space. SOCO can significantly reduce the number of bits written to save considerable energy for NVM-based main memories. By relaxing the goal of a conventional compression, the proposed approach practically eliminates memory addressing and management overheads incurred by compression techniques designed to save space. Our experiments show that SOCO provides more than 50% reduction in bits written, resulting in 23% and 34% energy savings for Spin-transfer Torque (STT)-MRAM and Phase Change Memory (PCM), respectively.","PeriodicalId":255133,"journal":{"name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Space Oblivious Compression: Power Reduction for Non-Volatile Main Memories\",\"authors\":\"Yong Li, Haifeng Xu, R. Melhem, A. Jones\",\"doi\":\"10.1145/2742060.2742107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power consumption of main memory has become a critical concern and has led to proposals to employ emerging non-volatile memories (NVMs) to replace or augment DRAM. This paper proposes Space Oblivious COmpression (SOCO), an in-place lightweight compression mechanism particularly designed for reducing NVM-based main-memory energy rather than saving space. SOCO can significantly reduce the number of bits written to save considerable energy for NVM-based main memories. By relaxing the goal of a conventional compression, the proposed approach practically eliminates memory addressing and management overheads incurred by compression techniques designed to save space. Our experiments show that SOCO provides more than 50% reduction in bits written, resulting in 23% and 34% energy savings for Spin-transfer Torque (STT)-MRAM and Phase Change Memory (PCM), respectively.\",\"PeriodicalId\":255133,\"journal\":{\"name\":\"Proceedings of the 25th edition on Great Lakes Symposium on VLSI\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 25th edition on Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2742060.2742107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2742060.2742107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Space Oblivious Compression: Power Reduction for Non-Volatile Main Memories
Power consumption of main memory has become a critical concern and has led to proposals to employ emerging non-volatile memories (NVMs) to replace or augment DRAM. This paper proposes Space Oblivious COmpression (SOCO), an in-place lightweight compression mechanism particularly designed for reducing NVM-based main-memory energy rather than saving space. SOCO can significantly reduce the number of bits written to save considerable energy for NVM-based main memories. By relaxing the goal of a conventional compression, the proposed approach practically eliminates memory addressing and management overheads incurred by compression techniques designed to save space. Our experiments show that SOCO provides more than 50% reduction in bits written, resulting in 23% and 34% energy savings for Spin-transfer Torque (STT)-MRAM and Phase Change Memory (PCM), respectively.