TonyChopper:一个去同步包

Zhao Wang, Xiao He, C. Sechen
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引用次数: 8

摘要

TonyChopper是一套集成的数字电路去同步工具。TonyChopper的核心部分是一个读取门级合成同步数字电路并通过实现一种新颖的去同步方法将其转换为异步电路的工具。该包还提供了布局前和布局后的验证工具。提出的异步设计方法与传统的合成、放置和布线(PnR)以及其他计算机辅助设计(CAD)工具兼容。仅使用传统的标准单元库。与传统的同步静态CMOS设计相比,该设计非常适合于极低电压工作。该工具还集成了自动休眠策略,以最大限度地减少电路的泄漏功率。在IBM 130nm技术中实现了不同的基准电路,以表明TonyChopper中使用的设计方法即使在亚阈值状态下也具有很高的鲁棒性。使用Cadence PnR工具生成每个基准电路的布局。对同步基准电路和非同步基准电路进行了Hspice仿真,比较了各基准电路的延迟、面积和漏功率。对每个基准电路进行了蒙特卡罗模拟,以证明具有较大阈值电压变化的近阈值电源电压具有高鲁棒性和延迟不敏感性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
TonyChopper: A desynchronization package
TonyChopper is an integrated set of tools for digital circuit desynchronization. The core portion of TonyChopper is a tool that reads a gate-level synthesized synchronous digital circuit and transforms it to an asynchronous circuit by implementing a novel desynchronization approach. Pre-layout and post-layout verification tools are also provided in this package. The proposed new asynchronous design method is compatible with conventional synthesis, placement and routing (PnR) and other computer-aided design (CAD) tools. Only a conventional standard cell library is used. Compared to traditional synchronous static CMOS design, the proposed design is highly suitable for very low voltage operation. An auto-sleep strategy is also integrated in the tool for minimizing the leakage power for circuits. Different benchmark circuits were implemented in IBM 130nm technology to show that the design approach used in TonyChopper is highly robust even in the sub-threshold regime. The layout for every benchmark circuit was generated using a Cadence PnR tool. Hspice simulation for both the synchronous benchmark circuit and the desynchronized version provided comparison of the delay, area and leakage power for each benchmark circuit. Monte Carlo simulations were performed for each benchmark circuit to demonstrate high robustness and delay insensitivity for near threshold supply voltages with substantial threshold voltage (VT) variations.
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