{"title":"ggNMOS ESD保护结构的三维电热建模","authors":"Haolu Xie, R. Zhan, A. Wang, R. Gafiteanu","doi":"10.1109/APCCAS.2004.1412691","DOIUrl":null,"url":null,"abstract":"This work presents a simple-to-implement, 3D electro-thermal model for circuit-level SPICE simulation of grounded-gate NMOS (ggNMOS), with application for ESD (electrostatic discharge) protection circuit design verification. A new ESD discharging fitting resistor (R/sub on/) is employed to improve ESD electrical modeling in the high-current region and a new 3D thermal resistor parameter (R/sub th/) is proposed to model the electro-thermal characteristics of ggNMOS. The extraction method for the new parameters, R/sub on/ and R/sub th/, is discussed. Finally, simulation results are presented and compared with experimental data.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"3D electro-thermal modeling of ggNMOS ESD protection structure\",\"authors\":\"Haolu Xie, R. Zhan, A. Wang, R. Gafiteanu\",\"doi\":\"10.1109/APCCAS.2004.1412691\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a simple-to-implement, 3D electro-thermal model for circuit-level SPICE simulation of grounded-gate NMOS (ggNMOS), with application for ESD (electrostatic discharge) protection circuit design verification. A new ESD discharging fitting resistor (R/sub on/) is employed to improve ESD electrical modeling in the high-current region and a new 3D thermal resistor parameter (R/sub th/) is proposed to model the electro-thermal characteristics of ggNMOS. The extraction method for the new parameters, R/sub on/ and R/sub th/, is discussed. Finally, simulation results are presented and compared with experimental data.\",\"PeriodicalId\":426683,\"journal\":{\"name\":\"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-12-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2004.1412691\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2004.1412691","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3D electro-thermal modeling of ggNMOS ESD protection structure
This work presents a simple-to-implement, 3D electro-thermal model for circuit-level SPICE simulation of grounded-gate NMOS (ggNMOS), with application for ESD (electrostatic discharge) protection circuit design verification. A new ESD discharging fitting resistor (R/sub on/) is employed to improve ESD electrical modeling in the high-current region and a new 3D thermal resistor parameter (R/sub th/) is proposed to model the electro-thermal characteristics of ggNMOS. The extraction method for the new parameters, R/sub on/ and R/sub th/, is discussed. Finally, simulation results are presented and compared with experimental data.