{"title":"基于转发器的架构,利用Prolog的限制和并行性","authors":"J. Ruz, F. Saenz, L. Araujo","doi":"10.1109/MELCON.1991.162029","DOIUrl":null,"url":null,"abstract":"A system is presented for exploiting restricted-and-parallelism (RAP) in logic programs on a distributed (nonshared memory) architecture. The system uses global compilation techniques and is designed using the new generation of transputers (H1/C104). Externally, the system behaves as a sequential one, in which, the solutions are always produced according to the depth-first strategy.<<ETX>>","PeriodicalId":193917,"journal":{"name":"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A transputer-based architecture to exploit the restricted-and-parallelism of Prolog\",\"authors\":\"J. Ruz, F. Saenz, L. Araujo\",\"doi\":\"10.1109/MELCON.1991.162029\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A system is presented for exploiting restricted-and-parallelism (RAP) in logic programs on a distributed (nonshared memory) architecture. The system uses global compilation techniques and is designed using the new generation of transputers (H1/C104). Externally, the system behaves as a sequential one, in which, the solutions are always produced according to the depth-first strategy.<<ETX>>\",\"PeriodicalId\":193917,\"journal\":{\"name\":\"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MELCON.1991.162029\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.1991.162029","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A transputer-based architecture to exploit the restricted-and-parallelism of Prolog
A system is presented for exploiting restricted-and-parallelism (RAP) in logic programs on a distributed (nonshared memory) architecture. The system uses global compilation techniques and is designed using the new generation of transputers (H1/C104). Externally, the system behaves as a sequential one, in which, the solutions are always produced according to the depth-first strategy.<>