物理邻域模式敏感故障的ram测试算法

M. Franklin, K. Saluja
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引用次数: 15

摘要

最先进的存储芯片设计有备用行和列,以便重新配置。在内存芯片被重新配置后,物理上相邻的单元可能不再具有连续的逻辑地址。后期用于检测物理邻域模式敏感故障的测试算法必须考虑存储芯片的地址映射不再可用的事实。此外,RAM解码器的设计以最小化整体硅面积和关键路径长度为目标。这还可能导致物理上相邻的行(和列)在逻辑上不相邻的设计。在本文中,我们提出了一种新的测试算法来检测动态ram中的5-cell和9-cell物理邻域模式敏感故障,即使逻辑地址和物理地址不同,并且物理到逻辑地址映射不可用。对于n位ram,这些算法的测试长度为0 (Nr10g3M4),并且还可以检测卡滞和耦合故障等其他故障。该算法依赖于一种高效的3-着色算法的发展,该算法在最多r1og34个着色步骤中对一组n个对象中的所有三元组进行微色。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
AN ALGORITHM TO TEST RAMS FOR PHYSICAL NEIGHBORHOOD PATTERN SENSITIVE FAULTS
State-of-the-art memory chips are designed with spare rows and columns for reconfiguration purposes. After a memory chip is reconfigured, physically adjacent cells may no longer have consecutive logical addresses. Test algorithms used at later stages for the detection of physical neighborhood pattern sensitive faults have to consider the fact that the address mapping of the memory chip is no longer available. Furthermore, RAM decoders are designed with a view to minimize the overall silicon area and critical path lengths. This can also result in designs in which physically adjacent rows (and columns) are not logically adjacent. In this paper, we present new test algorithms to detect 5-cell and 9-cell physical neighborhood pattern sensitive faults in dynamic RAMs, even if the logical and physical addresses are different and the physical-to-logical address mapping is not available. These algorithms have test lengths of O(Nr10g3M4) for N-bit RAMs, and also detect other faults such as stuck-at and coupling faults. The algorithms depend on the development of an efficient 3-coloring algorithm that michromatically colors all the triplets among a group off n objects in at most r1og34 coloring steps.
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