使用产品质量估计的确定性测试集的优化

G. Spiegel, A. P. Stroele
{"title":"使用产品质量估计的确定性测试集的优化","authors":"G. Spiegel, A. P. Stroele","doi":"10.1109/ATS.1993.398790","DOIUrl":null,"url":null,"abstract":"The probabilities of faults in VLSI circuits generally differ by order of magnitude. This paper presents an approach to product quality estimation that considers these different fault probabilities. Two efficient algorithms are described that optimize deterministic test sets such that a high product quality is achieved with short test lengths.<<ETX>>","PeriodicalId":228291,"journal":{"name":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Optimization of deterministic test sets using an estimation of product quality\",\"authors\":\"G. Spiegel, A. P. Stroele\",\"doi\":\"10.1109/ATS.1993.398790\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The probabilities of faults in VLSI circuits generally differ by order of magnitude. This paper presents an approach to product quality estimation that considers these different fault probabilities. Two efficient algorithms are described that optimize deterministic test sets such that a high product quality is achieved with short test lengths.<<ETX>>\",\"PeriodicalId\":228291,\"journal\":{\"name\":\"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-11-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1993.398790\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1993.398790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

摘要

在超大规模集成电路中,故障的概率通常相差一个数量级。本文提出了一种考虑这些不同故障概率的产品质量估计方法。描述了两种有效的算法,优化确定性测试集,从而在短测试长度下获得高产品质量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Optimization of deterministic test sets using an estimation of product quality
The probabilities of faults in VLSI circuits generally differ by order of magnitude. This paper presents an approach to product quality estimation that considers these different fault probabilities. Two efficient algorithms are described that optimize deterministic test sets such that a high product quality is achieved with short test lengths.<>
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信