{"title":"PPSFP模拟器的快速签名仿真","authors":"F. Khadour, Xiaoling Sun","doi":"10.1109/DFTVS.1999.802884","DOIUrl":null,"url":null,"abstract":"This paper presents a novel technique to compute the signatures of multiple-input shift-registers (MISRs) in computer simulation when used in conjunction with parallel pattern single fault propagation (PPSFP) simulators. We first use a look-up table technique similar to compute a set of signatures, one for each input data stream of a MISR, at a common input tap position. Then we present an algorithm that modifies these signatures to reflect their actual input positions and obtain the final signature. Our experimental results show that the proposed signature simulation technique outperforms some existing methods with minimal memory requirements.","PeriodicalId":448322,"journal":{"name":"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)","volume":"378 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fast signature simulation for PPSFP simulators\",\"authors\":\"F. Khadour, Xiaoling Sun\",\"doi\":\"10.1109/DFTVS.1999.802884\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel technique to compute the signatures of multiple-input shift-registers (MISRs) in computer simulation when used in conjunction with parallel pattern single fault propagation (PPSFP) simulators. We first use a look-up table technique similar to compute a set of signatures, one for each input data stream of a MISR, at a common input tap position. Then we present an algorithm that modifies these signatures to reflect their actual input positions and obtain the final signature. Our experimental results show that the proposed signature simulation technique outperforms some existing methods with minimal memory requirements.\",\"PeriodicalId\":448322,\"journal\":{\"name\":\"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)\",\"volume\":\"378 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1999.802884\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1999.802884","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a novel technique to compute the signatures of multiple-input shift-registers (MISRs) in computer simulation when used in conjunction with parallel pattern single fault propagation (PPSFP) simulators. We first use a look-up table technique similar to compute a set of signatures, one for each input data stream of a MISR, at a common input tap position. Then we present an algorithm that modifies these signatures to reflect their actual input positions and obtain the final signature. Our experimental results show that the proposed signature simulation technique outperforms some existing methods with minimal memory requirements.