{"title":"基于超宽带认知无线电的3-10mW、3.1-10.6GHz整数n QPLL参考杂散抑制技术","authors":"Nam-Seog Kim, J. Rabaey","doi":"10.1109/RFIC.2015.7337706","DOIUrl":null,"url":null,"abstract":"An integer-N charge pump QPLL provides 3.168 - 10.56GHz lock range, -108.38dBc/Hz phase noise at 1MHz offset, and -59.42dBc reference spur with digital calibration technique for charge pump mismatch while consuming 10.1mW at 10.56GHz with 4-divder at the output. A wideband low power TSPC programmable divider supports 57 sub-bands. It is implemented in a 1V 65nm CMOS process. Active area is 0.12mm2.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 3–10mW, 3.1–10.6GHz integer-N QPLL with reference spur reduction technique for UWB-based cognitive radios\",\"authors\":\"Nam-Seog Kim, J. Rabaey\",\"doi\":\"10.1109/RFIC.2015.7337706\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An integer-N charge pump QPLL provides 3.168 - 10.56GHz lock range, -108.38dBc/Hz phase noise at 1MHz offset, and -59.42dBc reference spur with digital calibration technique for charge pump mismatch while consuming 10.1mW at 10.56GHz with 4-divder at the output. A wideband low power TSPC programmable divider supports 57 sub-bands. It is implemented in a 1V 65nm CMOS process. Active area is 0.12mm2.\",\"PeriodicalId\":121490,\"journal\":{\"name\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2015.7337706\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337706","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 3–10mW, 3.1–10.6GHz integer-N QPLL with reference spur reduction technique for UWB-based cognitive radios
An integer-N charge pump QPLL provides 3.168 - 10.56GHz lock range, -108.38dBc/Hz phase noise at 1MHz offset, and -59.42dBc reference spur with digital calibration technique for charge pump mismatch while consuming 10.1mW at 10.56GHz with 4-divder at the output. A wideband low power TSPC programmable divider supports 57 sub-bands. It is implemented in a 1V 65nm CMOS process. Active area is 0.12mm2.
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