{"title":"电子束测试的进展","authors":"E. Wolfgang, S. Gorlich, E. Plies","doi":"10.1109/CMPEUR.1989.93495","DOIUrl":null,"url":null,"abstract":"To describe the progress of e-beam testing in recent years, four subaspects are examined: electron-optical improvements, waveform processing, capacitive voltage measurements, and the integration of e-beam testing with computer-aided design and testing. For the case of megabit DRAMs it can be shown that the interconnection width of the uppermost level metallization does not continue to decrease, since a two-layer metallization is used in the 17-b DRAM. In the future, therefore, greater efforts must be invested in designing for e-beam testability, whereas the electron-optical properties of existing dedicated e-beam testers appear to be well suited to meet the demands of the coming years.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Progress in electron-beam testing\",\"authors\":\"E. Wolfgang, S. Gorlich, E. Plies\",\"doi\":\"10.1109/CMPEUR.1989.93495\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To describe the progress of e-beam testing in recent years, four subaspects are examined: electron-optical improvements, waveform processing, capacitive voltage measurements, and the integration of e-beam testing with computer-aided design and testing. For the case of megabit DRAMs it can be shown that the interconnection width of the uppermost level metallization does not continue to decrease, since a two-layer metallization is used in the 17-b DRAM. In the future, therefore, greater efforts must be invested in designing for e-beam testability, whereas the electron-optical properties of existing dedicated e-beam testers appear to be well suited to meet the demands of the coming years.<<ETX>>\",\"PeriodicalId\":304457,\"journal\":{\"name\":\"Proceedings. VLSI and Computer Peripherals. COMPEURO 89\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. VLSI and Computer Peripherals. COMPEURO 89\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CMPEUR.1989.93495\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPEUR.1989.93495","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
To describe the progress of e-beam testing in recent years, four subaspects are examined: electron-optical improvements, waveform processing, capacitive voltage measurements, and the integration of e-beam testing with computer-aided design and testing. For the case of megabit DRAMs it can be shown that the interconnection width of the uppermost level metallization does not continue to decrease, since a two-layer metallization is used in the 17-b DRAM. In the future, therefore, greater efforts must be invested in designing for e-beam testability, whereas the electron-optical properties of existing dedicated e-beam testers appear to be well suited to meet the demands of the coming years.<>