高电阻率SOI衬底中减少串扰的高效多晶硅钝化层

K. Ben Ali, C. Roda Neve, A. Gharsallah, J. Raskin
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引用次数: 7

摘要

深入研究了衬底串扰和射频损耗,以及稳定多晶硅层的引入。提出了一种新的等效集总电路,用于模拟不同衬底类型、电阻率和SiO2-Si界面质量,并通过仿真和实验数据进行了验证。它还可以有效地模拟在界面处引入高陷阱密度,并成功地解释了HR-Si衬底在低频时衬底串扰的较高测量值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Efficient polysilicon passivation layer for crosstalk reduction in high-resistivity SOI substrates
Substrate crosstalk and RF losses in HR-SOI, and the introduction of a stabilized polysilicon layer are deeply investigated. A new equivalent lumped circuit to model different substrate types and resistivities, and SiO2-Si interface qualities is proposed and validated by simulation and experimental data. It is also valid to model the introduction of high-trap density at the interface, and it successfully explains the higher measured values of substrate crosstalk at low frequencies for HR-Si substrates.
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