一个1.2V-21dBm oip3.4 /sup /-order active-g/sub - m/-RC可重构(UMTS/WLAN)滤波器，带有片上调谐，采用自动工具设计

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI:10.1109/ESSCIR.2005.1541623

S. D’Amico, V. Giannini, A. Baschirotto

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引用次数: 19

摘要

提出了一种用于可重构终端UMTS/WLAN接收机的4/sup /阶低通连续时间滤波器。该滤波器采用两个有源g/sub / rc双单元，其中一个运放用于两个极点，其单位增益带宽与滤波器截止频率相当。因此，与其他闭环滤波器配置相比，运放功耗大大降低。由于工艺扩散、老化和温度变化引起的截止频率偏差通过片上调谐电路进行调节。采用0.13/spl mu/m CMOS技术的器件占地0.9mm/sup / m2, UMTS和WLAN功耗分别为3.4mW和14.2mW。利用自动设计工具设计了全芯片，实验结果与预期性能相符。

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A 1.2V-21dBm OIP3 4/sup th/-order active-g/sub m/-RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic tool

A 4/sup th/ order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented. The filter uses two active-g/sub m/-RC biquad cells, where a single opamp is used for two poles and its unity-gain-bandwidth is comparable to the filter cut-off frequency. Thus, the opamp power consumption is strongly reduced with other closed-loop filter configuration. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by an on-chip tuning circuit. The device in a 0.13/spl mu/m CMOS technology occupies a 0.9mm/sup 2/ area and consumes 3.4mW and 14.2mW for the UMTS and WLAN, respectively. The full chip has been designed using an automatic design tool and the experimental results agree with the expected performance.

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Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.

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