弱内存模型下的非干扰

H. Mantel, Matthias Perner, Jens Sauer
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引用次数: 8

摘要

尽管现代多核处理器通常支持较弱的一致性保证,但对并发程序信息流安全性的研究通常采用顺序一致性。在本文中,我们阐明了顺序一致性松弛对信息流安全性的影响。我们考虑了四种内存模型,并证明了每种模型下的信息流安全并不意味着任何其他模型下的信息流安全。这一结果表明,安全研究需要更多地关注当代硬件提供的一致性保证。本文的另一个主要技术贡献是一个程序转换,它可以在不同的内存模型下有效地执行信息流安全性。与首先建立顺序一致性,然后对并发程序应用传统信息流分析的转换相比,这种程序转换的限制要少得多。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Noninterference under Weak Memory Models
Research on information flow security for concurrent programs usually assumes sequential consistency although modern multi-core processors often support weaker consistency guarantees. In this article, we clarify the impact that relaxations of sequential consistency have on information flow security. We consider four memory models and prove for each of them that information flow security under this model does not imply information flow security in any of the other models. This result suggests that research on security needs to pay more attention to the consistency guarantees provided by contemporary hardware. The other main technical contribution of this article is a program transformation that soundly enforces information flow security under different memory models. This program transformation is significantly less restrictive than a transformation that first establishes sequential consistency and then applies a traditional information flow analysis for concurrent programs.
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