化学气相沉积SiC/SOI的位置控制形成Si纳米孔(100)

Y. Ikoma, H. Yahaya, H. Sakita, Yuta Nishino, T. Motooka
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引用次数: 1

摘要

利用化学气相沉积(CVD)技术研究了绝缘体上硅(SOI)衬底薄硅层表面位置控制纳米孔的形成。采用各向异性刻蚀的方法制备了硅膜。在衬底温度900℃下,利用CH3SiH3脉冲射流CVD从背面表面生长SiC薄膜。在硅膜上观察到尺寸≤0.5 μm的方形凹坑,而在硅顶层没有形成凹坑。这一结果表明,在不使用SiO2掩膜的情况下,可以控制顶部Si层纳米孔的位置。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Position-controlled formation of Si nanopores by chemical vapor deposition of SiC/SOI(100)
We investigated the position-controlled nanopore formation in the surface of thin Si layer of a Silicon on Insulator (SOI) substrate by utilizing chemical vapor deposition (CVD). The Si membrane was obtained by anisotropic etching of the handle wafer. The SiC film growth was carried out from the backside surface by utilizing CH3SiH3 pulse jet CVD at the substrate temperature of 900 °C. Square pits with the sizes of ≤0.5 μm were observed on the Si membrane while no pit was formed on the top Si layer. This result indicates that the position of the nanopores on the top Si layer can be controlled without using SiO2 masks on the front side surface.
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