{"title":"一个穿孔隔离动态RAM单元","authors":"G. Taylor, P. Chatterjee, H. Fu, A. Tasch","doi":"10.1109/IEDM.1978.189426","DOIUrl":null,"url":null,"abstract":"A novel dynamic RAM Cell concept is introduced. The operation, charge storage mechanism and layout of the cell are similar in essence to the VMOS RAM Cell [1]. The novelty is in the use of a punch-through mechanism to address the cell. This results in a planar cell which may be fabricated using regular NMOS technology. The cell structure has the potential for very high density, low leakage and charge capacity comparable to the normal one-transistor cell. Measurements on the cell are compared with those on a one-transistor cell.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A punch-through isolated dynamic RAM cell\",\"authors\":\"G. Taylor, P. Chatterjee, H. Fu, A. Tasch\",\"doi\":\"10.1109/IEDM.1978.189426\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel dynamic RAM Cell concept is introduced. The operation, charge storage mechanism and layout of the cell are similar in essence to the VMOS RAM Cell [1]. The novelty is in the use of a punch-through mechanism to address the cell. This results in a planar cell which may be fabricated using regular NMOS technology. The cell structure has the potential for very high density, low leakage and charge capacity comparable to the normal one-transistor cell. Measurements on the cell are compared with those on a one-transistor cell.\",\"PeriodicalId\":164556,\"journal\":{\"name\":\"1978 International Electron Devices Meeting\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1978 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1978.189426\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1978 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1978.189426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel dynamic RAM Cell concept is introduced. The operation, charge storage mechanism and layout of the cell are similar in essence to the VMOS RAM Cell [1]. The novelty is in the use of a punch-through mechanism to address the cell. This results in a planar cell which may be fabricated using regular NMOS technology. The cell structure has the potential for very high density, low leakage and charge capacity comparable to the normal one-transistor cell. Measurements on the cell are compared with those on a one-transistor cell.
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