{"title":"低功耗QDI异步FFT","authors":"Benjamin Z. Tang, F. Lane","doi":"10.1109/ASYNC.2016.17","DOIUrl":null,"url":null,"abstract":"We present an asynchronous (QDI) FFT design for low-power M2M communication. The design achieves low power by having efficient memory controls, twiddle multiplication, and allowing all subsystems in this nested butterfly architecture to run only as fast as they need to run. For a 10MHz input data rate, our 128-point, 16-bit, radix-23 FFT design consumes only 5.9nJ of energy at Vdd=1V in a 65nm technology.","PeriodicalId":314538,"journal":{"name":"2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Low Power QDI Asynchronous FFT\",\"authors\":\"Benjamin Z. Tang, F. Lane\",\"doi\":\"10.1109/ASYNC.2016.17\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an asynchronous (QDI) FFT design for low-power M2M communication. The design achieves low power by having efficient memory controls, twiddle multiplication, and allowing all subsystems in this nested butterfly architecture to run only as fast as they need to run. For a 10MHz input data rate, our 128-point, 16-bit, radix-23 FFT design consumes only 5.9nJ of energy at Vdd=1V in a 65nm technology.\",\"PeriodicalId\":314538,\"journal\":{\"name\":\"2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASYNC.2016.17\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASYNC.2016.17","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We present an asynchronous (QDI) FFT design for low-power M2M communication. The design achieves low power by having efficient memory controls, twiddle multiplication, and allowing all subsystems in this nested butterfly architecture to run only as fast as they need to run. For a 10MHz input data rate, our 128-point, 16-bit, radix-23 FFT design consumes only 5.9nJ of energy at Vdd=1V in a 65nm technology.