{"title":"一个多功能的时域里德-所罗门解码器","authors":"Y. Shayan, T. Le-Ngoc, V. Bhargava","doi":"10.1109/GLOCOM.1989.64125","DOIUrl":null,"url":null,"abstract":"A versatile Reed-Solomon (RS) decoder structure based on a time-domain decoding algorithm is developed. The algorithm is modified to increase the performance, and a method is introduced to decode any RS code generated by any generator polynomial. The main advantage of the introduced decoder structure is the versatility. By a versatile decoder, the authors mean a decoder that can be programmed to decode any RS code defined in Galois field 2/sup m/ with a fixed symbol size m. This decoder can correct both errors and erasures for any RS code, including shortened and singly extended codes. The introduced decoder has a very simple structure and can be used to design high-speed, single-chip VLSI decoders.<<ETX>>","PeriodicalId":256305,"journal":{"name":"IEEE Global Telecommunications Conference, 1989, and Exhibition. 'Communications Technology for the 1990s and Beyond","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A versatile time domain Reed-Solomon decoder\",\"authors\":\"Y. Shayan, T. Le-Ngoc, V. Bhargava\",\"doi\":\"10.1109/GLOCOM.1989.64125\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A versatile Reed-Solomon (RS) decoder structure based on a time-domain decoding algorithm is developed. The algorithm is modified to increase the performance, and a method is introduced to decode any RS code generated by any generator polynomial. The main advantage of the introduced decoder structure is the versatility. By a versatile decoder, the authors mean a decoder that can be programmed to decode any RS code defined in Galois field 2/sup m/ with a fixed symbol size m. This decoder can correct both errors and erasures for any RS code, including shortened and singly extended codes. The introduced decoder has a very simple structure and can be used to design high-speed, single-chip VLSI decoders.<<ETX>>\",\"PeriodicalId\":256305,\"journal\":{\"name\":\"IEEE Global Telecommunications Conference, 1989, and Exhibition. 'Communications Technology for the 1990s and Beyond\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-11-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Global Telecommunications Conference, 1989, and Exhibition. 'Communications Technology for the 1990s and Beyond\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLOCOM.1989.64125\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Global Telecommunications Conference, 1989, and Exhibition. 'Communications Technology for the 1990s and Beyond","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLOCOM.1989.64125","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A versatile Reed-Solomon (RS) decoder structure based on a time-domain decoding algorithm is developed. The algorithm is modified to increase the performance, and a method is introduced to decode any RS code generated by any generator polynomial. The main advantage of the introduced decoder structure is the versatility. By a versatile decoder, the authors mean a decoder that can be programmed to decode any RS code defined in Galois field 2/sup m/ with a fixed symbol size m. This decoder can correct both errors and erasures for any RS code, including shortened and singly extended codes. The introduced decoder has a very simple structure and can be used to design high-speed, single-chip VLSI decoders.<>