Golden IC free methodology for hardware Trojan detection using symmetric path delays

Hardware Trojans can be inserted by an adversary at any phase of IC manufacturing. In this paper, a methodology is proposed to detect Trojans inserted after design sign-off i.e the Trojan insertion occurs at layout level. In such attack models, golden IC are not always available in all cases, thus requiring golden IC free detection methodologies. This work exploits the concept of symmetric path delays to detect Trojans, considering the change in delays of symmetric pairs due to Trojan insertion. We propose detection metric (DM) of a suspect IC and compare the same with a detection threshold (DT) to decide whether IC under purview is Trojan free. Moreover, this method does not require any golden IC. Additionally, this method is robust enough against process variation effects. Simulation results establish that, a detection rate of 100% is achievable with maximum of 8% intra-die and 10% inter-die variation in both threshold voltage (Vth) and length (L), respectively.