用于CHAMP的通用处理器元件封装

B. Box, J. Nieznanski
{"title":"用于CHAMP的通用处理器元件封装","authors":"B. Box, J. Nieznanski","doi":"10.1109/NAECON.1995.521973","DOIUrl":null,"url":null,"abstract":"A generic approach for packaging advanced, application specific processors as well a future processing elements into a common JEDEC MCM (Multi-chip Module) footprint is presented and demonstrated. Usage of a common I/O scheme at the MCM level eases future device upgrades, maximizes module reuse and minimizes redesign. An 11-chip, Xilinx XC4025 FPGA (Field Programmable Gate Array) based MCM was designed and built as a compute element using our CHAMP (Configurable Hardware Algorithm Mappable Preprocessor) architecture as a prototype for demonstrating the validity of the common processor element packaging strategy. We have conservatively estimated that for a wide range of solutions, the CHAMP MCM offers a cumulative 100:1 improvement in size, weight, power, cycle time and cost compared to state-of-the-art, individually packaged DSPs and microprocessors on custom PCBs. The MCM design approach, implementation tradeoffs and experimental results for various measured performance parameters are also given.","PeriodicalId":171918,"journal":{"name":"Proceedings of the IEEE 1995 National Aerospace and Electronics Conference. NAECON 1995","volume":"99 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Common processor element packaging for CHAMP\",\"authors\":\"B. Box, J. Nieznanski\",\"doi\":\"10.1109/NAECON.1995.521973\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A generic approach for packaging advanced, application specific processors as well a future processing elements into a common JEDEC MCM (Multi-chip Module) footprint is presented and demonstrated. Usage of a common I/O scheme at the MCM level eases future device upgrades, maximizes module reuse and minimizes redesign. An 11-chip, Xilinx XC4025 FPGA (Field Programmable Gate Array) based MCM was designed and built as a compute element using our CHAMP (Configurable Hardware Algorithm Mappable Preprocessor) architecture as a prototype for demonstrating the validity of the common processor element packaging strategy. We have conservatively estimated that for a wide range of solutions, the CHAMP MCM offers a cumulative 100:1 improvement in size, weight, power, cycle time and cost compared to state-of-the-art, individually packaged DSPs and microprocessors on custom PCBs. The MCM design approach, implementation tradeoffs and experimental results for various measured performance parameters are also given.\",\"PeriodicalId\":171918,\"journal\":{\"name\":\"Proceedings of the IEEE 1995 National Aerospace and Electronics Conference. NAECON 1995\",\"volume\":\"99 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 1995 National Aerospace and Electronics Conference. NAECON 1995\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.1995.521973\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 1995 National Aerospace and Electronics Conference. NAECON 1995","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.1995.521973","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

提出并演示了一种通用的方法,用于封装先进的、特定于应用程序的处理器以及未来的处理元素到一个通用的JEDEC MCM(多芯片模块)足迹。在MCM级别使用通用I/O方案可以简化未来的设备升级,最大化模块重用并最小化重新设计。基于11片Xilinx XC4025 FPGA(现场可编程门阵列)的MCM被设计和构建为计算元件,使用我们的CHAMP(可配置硬件算法映射预处理器)架构作为原型,以证明通用处理器元件封装策略的有效性。我们保守估计,对于广泛的解决方案,CHAMP MCM在尺寸、重量、功率、周期时间和成本方面,与定制pcb上最先进的、单独封装的dsp和微处理器相比,提供了100:1的累积改进。文中还给出了MCM的设计方法、实现折衷和各种性能参数的实验结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Common processor element packaging for CHAMP
A generic approach for packaging advanced, application specific processors as well a future processing elements into a common JEDEC MCM (Multi-chip Module) footprint is presented and demonstrated. Usage of a common I/O scheme at the MCM level eases future device upgrades, maximizes module reuse and minimizes redesign. An 11-chip, Xilinx XC4025 FPGA (Field Programmable Gate Array) based MCM was designed and built as a compute element using our CHAMP (Configurable Hardware Algorithm Mappable Preprocessor) architecture as a prototype for demonstrating the validity of the common processor element packaging strategy. We have conservatively estimated that for a wide range of solutions, the CHAMP MCM offers a cumulative 100:1 improvement in size, weight, power, cycle time and cost compared to state-of-the-art, individually packaged DSPs and microprocessors on custom PCBs. The MCM design approach, implementation tradeoffs and experimental results for various measured performance parameters are also given.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信